Driven by ever-increasing requirements on improved wafer temperature uniformity for smaller features on the wafer, equipment manufacturers are developing heated plates (or chucks) with more and more actuator zones to achieve finer resolution of the actuated heat. From a control standpoint, two principally different plate designs can be distinguished: one that has a temperature sensor in each zone in order to tightly control the zone temperature in closed-loop fashion; the other that does not have temperature sensors in each zone, and therefore controls zone temperature by commanding heater power in an open-loop fashion. A third design could be a combination of the above two designs. Each design has its pros and cons, but the goal of both is the same: to achieve better wafer temperature uniformity. Another aspect that is the same in both designs is that tuning of these multi-zone plates is complex because of the strong heat transfer coupling between the zones. For plates with only a few zones, typically a design of experiment (DOE) is used to do the tuning. However, for plates with many zones, not only does this become impractical, but also more error prone. A more systematic approach is needed.
In this research, we follow a model-based temperature/CD tuning approach. By creating an accurate model of the multi-zone plate heat transfer, and integrating this with optimization algorithms, a tuning method is created that provides optimal wafer temperature uniformity for arbitrarily complex heated plates. The tuning method provides a customized solution that maximizes performance for each unique plate.
As an example, a plate model with 33 zones for a 300 mm wafer process was built, with a sensor in each zone, allowing for 33 independently controlled and measured zones. The plate itself is a 25 mm thick Al base plate with a 10 mm thick ceramic layer. The gap between wafer and plate is modeled at 100 microns, and the cooling temperature at the bottom of the base plate is held at 20°C. All these and other details are modeled in order to get the most detailed representation of the heat transfer from plate to the wafer. Next, this model was used in conjunction with a constrained optimization algorithm to compute the optimal temperature offset that provides the smallest possible temperature non-uniformity across the plate.